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VNS3NV04D-E
OMNIFET II fully autoprotected Power MOSFET
Features
Max On-State resistance (per ch.) Current limitation (typ) Drain-Source clamp voltage RON ILIMH VCLAMP 120m 3.5A 40V
SO-8

Linear current limitation Thermal shut down Short circuit protection Integrated clamp Low current drawn from input pin Diagnostic feedback through input pin Esd protection Direct access to the gate of the power mosfet (analog driving) Compatible with standard power mosfet
Description
The VNS3NV04D-E is a device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPower M0-3 Technology: they are intended for replacement of standard Power MOSFETs from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin.
Table 1.
Device summary
Order codes Package Tube SO-8 VNS3NV04D-E Tape and Reel VNS3NV04DTR-E
July 2007
Rev 2
1/21
www.st.com 21
Contents
VNS3NV04D-E
Contents
1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 2.2 2.3 2.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 3.2 3.3 3.4 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 4.2 4.3 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SO-8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
VNS3NV04D-E
List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Source Drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections (-40C < Tj < 150C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . 9 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3/21
List of figures
VNS3NV04D-E
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Source-Drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static Drain-Source On resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static Drain-Source On resistance vs. Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static Drain-Source On resistance Vs. Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static Drain-Source On resistance Vs. Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn On current slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn On current slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input voltage Vs. Input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn off Drain source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn off Drain-Source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized On resistance Vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized Input threshold voltage Vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normalized current limit Vs. junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SO-8 package mechanical data & package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SO-8 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
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VNS3NV04D-E
Block diagram and pin description
1
Block diagram and pin description
Figure 1. Block diagram
DRAIN1
DRAIN2
OVERVOLTAGE CLAMP INPUT1 GATE CONTROL
OVERVOLTAGE CLAMP GATE CONTROL INPUT2
OVER TEMPERATURE
LINEAR CURRENT LIMITER
LINEAR CURRENT LIMITER
OVER TEMPERATURE
SOURCE1
SOURCE2
Figure 2.
Configuration diagram (top view)
SOURCE 1 INPUT 1 SOURCE 2 INPUT 2
1
8
DRAIN 1 DRAIN 1 DRAIN 2
4
5
DRAIN 2
5/21
Electrical specifications
VNS3NV04D-E
2
Electrical specifications
Figure 3. Current and voltage conventions
IIN1 IIN2 VIN2
RIN1
INPUT 1 DRAIN 1 ID2 INPUT 2 SOURCE 1 DRAIN 2 SOURCE 2
ID1
VIN1
RIN2
VDS1
VDS1
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document. Table 2.
Symbol VDSn VINn IINn RIN MINn IDn IRn VESD1 VESD2 Ptot Tj Tc Tstg
Absolute maximum ratings
Parameter Drain-Source Voltage (VINn=0V) Input voltage Input current Minimum input series impedance Drain current Reverse DC output current Electrostatic discharge (R=1.5K C=100pF) , Electrostatic discharge on output pins only (R=330 , C=150pF) Total dissipation at Tc=25C Operating junction temperature Case operating temperature Storage temperature Value Internally clamped Internally clamped +/-20 220 Internally limited -5.5 4000 16500 4 Internally limited Internally limited -55 to 150 Unit V V mA A A V V C C C
6/21
VNS3NV04D-E
Electrical specifications
2.2
Thermal data
Table 3.
Symbol Rthj-lead Rthj-amb
Thermal data
Parameter Thermal resistance junction-lead (per channel) Thermal resistance junction-ambient
2
Max value 30 80(1)
Unit C/W C/W
1. When mounted on a standard single-sided FR4 board with 50mm of Cu (at least 35 m thick) connected to all DRAIN pins of the relative channel
2.3
Electrical characteristics
Values specified in this section are for -40C< Tj <150C, unless otherwise stated. Table 4.
Symbol VCLAMP VCLTH VINTH IISS VINCL
Off
Parameter Drain-Source clamp voltage Drain-Source clamp threshold voltage Input threshold voltage Supply current from input pin Input-Source clamp voltage Zero input voltage drain current (VIN=0V) Test Conditions VIN=0V; ID=1.5A VIN=0V; ID=2mA VDS=VIN; ID=1mA VDS=0V; VIN=5V IIN=1mA IIN=-1mA VDS=13V; VIN=0V; Tj=25C VDS=25V; VIN=0V 6 -1.0 Min 40 36 0.5 100 6.8 2.5 150 8 -0.3 30 75 Typ 45 Max 55 Unit V V V A V
IDSS
A
Table 5.
Symbol RDS(on)
On
Parameter Static Drain-Source On resistance Test conditions VIN=5V; ID=1.5A; Tj=25C VIN=5V; ID=1.5A Min Typ Max 120 240 Unit m
7/21
Electrical specifications
VNS3NV04D-E
Electrical characteristics (continued) (Tj=25C, unless otherwise specified) Table 6.
Symbol gfs (1) COSS
Dynamic
Parameter Forward transconductance Output capacitance Test conditions VDD=13V; ID=1.5A VDS=13V; f=1MHz; VIN=0V Min Typ 5.0 150 Max Unit S pF
Table 7.
Symbol td(on) tr td(off) tf td(on) tr td(off) tf
Switching
Parameter Turn-on delay time Rise Time Turn-off delay time Fall time Turn-on delay time Rise time Turn-off delay time Fall time VDD=15V; ID=1.5A Vgen=5V; Rgen=RIN MIN=220 VDD=12V; ID=1.5A; VIN=5V Igen=2.13mA (see Figure 7) VDD=15V; ID=1.5A Vgen=5V; Rgen=2.2 K (see Figure 4) VDD=15V; ID=1.5A Vgen=5V; Rgen=RIN MIN=220 (see Figure 4) Test conditions Min Typ 90 250 450 250 0.45 2.5 3.3 2.0 4.7 8.5 Max 300 750 1350 750 1.35 7.5 10.0 6.0 Unit ns ns ns ns s s s s A/s nC
(dI/dt)on Turn-on current slope Qi Total input charge
Table 8.
Symbol VSD(1) trr Qrr IRRM
Source Drain diode
Parameter Forward On voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=1.5A; dI/dt=12A/s VDD=30V; L=200H (see Figure 5) Test Conditions ISD=1.5A; VIN=0V Min Typ 0.8 107 37 0.7 Max Unit V ns C A
1. Pulsed: Pulse duration = 300s, duty cycle 1.5%
8/21
VNS3NV04D-E
Electrical specifications
Table 9.
Symbol Ilim tdlim Tjsh Tjrs Igf
Protections (-40C < Tj < 150C, unless otherwise specified)
Parameter Drain current limit Step response current limit Overtemperature shutdown Overtemperature reset Fault sink current Single pulse avalanche energy VIN=5V; VDS=13V; Tj=Tjsh Starting Tj=25C; VDD=24V VIN=5V Rgen=RIN MIN=220; L=24mH (see Figure 6 and Figure 8) Test Conditions VIN=5V; VDS=13V VIN=5V; VDS=13V 150 135 10 15 20 Min 3.5 Typ 5 10 175 200 Max 7 Unit A s C C mA
Eas
100
mJ
Figure 4.
Switching time test circuit for resistive load
VD Rgen Vgen
ID 90%
tr td(on)
10% td(off)
tf t
Vgen
t
9/21
Electrical specifications Figure 5. Test circuit for diode recovery times
VNS3NV04D-E
A D I
A
FAST DIODE
OMNIFET
S B
L=100uH B
220 Rgen
I
D
VDD
OMNIFET
S
Vgen
8.5
Figure 6.
Unclamped inductive load test circuits
RGEN
VIN PW
10/21
VNS3NV04D-E Figure 7. Input charge test circuit
Electrical specifications
VIN
GEN
ND8003
Figure 8.
Unclamped inductive waveforms
11/21
Electrical specifications
VNS3NV04D-E
2.4
Electrical characteristics curves
Figure 9.
Vsd (mV)
1100 1050 1000 950 900 850 800 750 700 650 600 0 1 2 3 4 5 6 7 8 9 10 11 12
Source-Drain diode forward characteristics
Figure 10. Static Drain-Source On resistance
Rds(on) (mohms)
1000
Vin= 0V
900 800 700 600 500 400 300 200 100 0 0.05 0.1 0.15 0.2
Tj= -40 C
Vin= 2.5V
Tj= C 25
Tj= 150 C
0.25
0.3
0.35
0.4
0.45
0.5
0.55
Id (A)
Id(A)
Figure 11. Derating curve
Figure 12. Static Drain-Source On resistance vs. Input voltage
Rds(on) (mohms)
300 275 250 225 200 175 150 125 100 75 50 25 0 3 3.5 4 4.5 5 5.5 6 6.5
I 3.5A d= I 1A d=
Tj= 150 C
Tj= C 25 Tj= -40C
I 3.5A d= I 1A d= I 3.5A d= I 1A d=
Vin(V)
Figure 13. Static Drain-Source On resistance Vs. Input voltage
Rds(on) (mohms)
250 225 200 175 150 125 100 75 50 25 0 3 3.5 4 4.5 5 5.5 6 6.5
Figure 14. Transconductance
Gfs (S)
11 10
I 1.5A d=
9 8
Vds= 13V
Tj= -40 C Tj= C 25 Tj= 150 C
Tj= 150 C
7 6 5 4
Tj= C 25 Tj= -40 C
3 2 1 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Vin(V)
Id (A)
12/21
VNS3NV04D-E
Electrical specifications
Figure 15. Static Drain-Source On resistance Vs. Id
Rds(on) (mohms)
250 225 200 175 150 125 100 75 50 25 0 0 0.5 1 1.5 2 2.5 3 3.5 4
Figure 16. Transfer characteristics
Idon (A)
6 5.5
Vin= 5V
Tj= 150 C
5 4.5 4 3.5 3
Tj= C 25
Vds= 13.5V
Tj= 150 C
2.5 2 1.5
Tj= C -40
Tj=- 40 C
Tj= C 25
1 0.5 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Id (A)
Vin (V)
Figure 17. Turn On current slope
Figure 18. Turn On current slope
di/dt(A/us)
5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500
di/dt(A/usec)
1.75
Vin= 5V Vdd= 15V I 1.5A d=
1.5 1.25 1 0.75 0.5 0.25 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500
Vin= 3.5V Vdd= 15V I 1.5A d=
Rg(ohm)
Rg(ohm)
Figure 19. Input voltage Vs. Input charge
Vin (V)
9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11
Figure 20. Turn off Drain source voltage slope
dv/dt(V/usec)
300 275
Vds= 1V I 1.5A d=
250 225 200 175 150 125 100 75 50 25 0 0 500 1000 1500
Vin= 5V Vdd= 15V I 1.5A d=
Qg (nC)
250
750
1250
1750
2000
2250
2500
Rg(ohm)
13/21
Electrical specifications
VNS3NV04D-E
Figure 21. Turn off Drain-Source voltage Figure 22. Capacitance variations slope
dv/dt(V/usec)
300 275 250 225 200 175 150 125 100 75 50 25 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500
50 0 5 10 15 20 25 30 35 100 150 200
C(pF)
350
Vin= 3.5V Vdd= 15V I 1.5A d=
300
250
f= 1MHz Vin= 0V
Rg(ohm)
Vds(V)
Figure 23. Switching time resistive load Figure 24. Switching time resistive load
t(usec)
4 3.5 3 2.5 2 1.5 1 0.5 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500
t(nsec)
900 800
Vdd= 15V I 1.5A d= Vin= 5V
td(off)
700
tr
tr
600 500
Vdd= 15V I 1.5A d= Rg= 220ohm
tf
400 300 200
td(off) tf td(on)
td(on)
100 0 3.25
3.5
3.75
4
4.25
4.5
4.75
5
5.25
Rg(ohm)
Vin(V)
Figure 25. Output characteristics
Figure 26. Normalized On resistance Vs. temperature
Rds(on) (mOhm)
4
Id (A)
5 4.5 4 3.5 3 2.5 2 1.5 1
Vin= 5V Vin= 4V
3.5 3 2.5 2 1.5 1
Vin= 5V I 1.5A d=
Vin= 3V
0.5 0 0 1 2 3 4 5 6 7 8 9 10
0.5 -50 -25 0 25 50 75 100 125 150 175
Vds (V)
Tc )C)
14/21
VNS3NV04D-E
Electrical specifications
Figure 27. Normalized Input threshold voltage Vs. temperature
Vinth (V)
2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 175
Figure 28. Normalized current limit Vs. junction temperature
Ilim (A)
10 9
Vds= Vin I 1mA d=
8 7 6 5 4 3 2 1 0 -50 -25
Vin= 5V Vds= 13V
0
25
50
75
100
125
150
175
Tc (C)
Tc (C)
Figure 29. Step response current limit
Tdlim(usec)
13 12.5 12 11.5 11 10.5 10 9.5 9 8.5 8 7.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5
Vin= 5V Rg= 220ohm
Vdd(V)
15/21
Protection features
VNS3NV04D-E
3
Protection features
During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50KHz. The only difference from the user's standpoint is that a small DC current IISS (typ. 100A) flows into the INPUT pin in order to supply the internal circuitry. The device integrates:
3.1
Overvoltage clamp protection
Internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads.
3.2
Linear current limiter circuit
Limits the drain current ID to Ilim whatever the INPUT pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh.
3.3
Overtemperature and short circuit protection
These are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 C, a typical value being 170 C. The device is automatically restarted when the chip temperature falls of about 15C below shut-down temperature.
3.4
Status feedback
In the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.
16/21
VNS3NV04D-E
Package and packing information
4
4.1
Package and packing information
ECOPACK(R) packages
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
17/21
Package and packing information
VNS3NV04D-E
4.2
SO-8 Package mechanical data
Figure 30. SO-8 package mechanical data & package outline
mm DIM. MIN. A A1 A2 b c D (1) E E1
(2)
inch MAX. 1.750 MIN. TYP. MAX. 0.0689 0.0098
TYP.
OUTLINE AND MECHANICAL DATA
0.100 1.250 0.280 0.170 4.800 5.800 3.800 4.900 6.000 3.900 1.270 0.250 0.400 1.040 0
0.250 0.0039 0.0492 0.480 0.0110 0.230 0.0067
0.0189 0.0091
5.000 0.1890 0.1929 0.1969 6.200 0.2283 0.2362 0.2441 4.000 0.1496 0.1535 0.1575 0.0500 0.500 0.0098 1.270 0.0157 0.0409 8 0.100 0 8 0.0039 0.0197 0.0500
e h L L1 k ccc
Notes: 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15mm in total (both side). 2. Dimension "E1" does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side.
SO-8
0016023 D
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VNS3NV04D-E
Package and packing information
4.3
SO-8 Packing information
Figure 31. SO-8 tube shipment (no suffix)
B C
A
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)
All dimensions are in mm.
100 2000 532 3.2 6 0.6
Figure 32. SO-8 tape and reel shipment (suffix "TR")
REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2
All dimensions are in mm.
End
Start Top cover tape No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min Components No components
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Revision history
VNS3NV04D-E
5
Revision history
Table 10.
Date 28-Oct-2005 02-Jul-2007
Document revision history
Revision 1 2 Initial release. Document reformatted and converted into new ST template. Table 4: Off - IDSS unit corrected Changes
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VNS3NV04D-E
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